Sampling rate for ADC library (T3.6 and T4)

H

hemsy

Active member
I'm using the Teensy ADC library, continuous mode. For instance my setup might look like:

Code: 
adc->adc0->setResolution(12);
adc->adc0->setSamplingSpeed(ADC_SAMPLING_SPEED::VERY_HIGH_SPEED);
adc->adc0->setConversionSpeed(ADC_CONVERSION_SPEED::HIGH_SPEED);
adc->adc0->setAveraging(1);
adc->adc0->enableInterrupts(isr);
adc->adc0->startContinuous(VID);

Is there an easy way to figure out the actual sampling speed? I can do an oscilloscopy on it, but a programmatic way would be preferable. It's just to hang a time axis on the conversions.
 
Posting complete sketch would allow better answer.

Seems an _ISR is getting called on each completed sample? Count those and in loop check and show the count each second?
 
Quick note: The forum webpage associated with the ADC library: https://forum.pjrc.com/threads/25532-ADC-library-update-now-with-support-for-Teensy-3-1
has some good information on how the different ADC settings will impact the ADC sample speed.

Since you are doing an ISR as defragster mentioned, and you can just count the interrupts.

If you wish to have specific speeds, there are examples using timers to control when the ADC is triggered.
There are also examples with this plus using DMA transfers, which removes most all of the system overhead.
 
Kurt, thanks. I've been putting off learning how to use DMA, maybe this is the time to jump into it.

With the settings shown above, I get about 1.34 MHz on Teensy 4.0
 
1.34 MHz is good - though the _ISR will be eating a bit of time doing that (maybe 10-20% of cpu cycles?). For high rates if needed trying the DMA interface would reduce the overt load - DMA will steal bus cycles in the background - but not have the overt loading.
 
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