Why is ARM_DWT_CYCCNT Cycle counternot running default on Teensy 3.x? Disadvantages?

[AlainD]

Hi

Why is ARM_DWT_CYCCNT running default on Teensy 4.x and not on Teensy 3.x?
Are there disadvantages on having the following code in setup by default?

if ( ARM_DWT_CYCCNT == ARM_DWT_CYCCNT ) 
{ // Enable CPU Cycle Counter
    ARM_DEMCR    |= ARM_DEMCR_TRCENA;         // enable debug/trace
    ARM_DWT_CTRL |= ARM_DWT_CTRL_CYCCNTENA;   // enable cycle counter
}

 

[defragster]

ARM_DWT_CYCCNT was enabled early in T_4.0 Beta development as a tool to calculate micros() offset from last millis().
Millis is run from a slow clock (24 MHz IIRC?) and that would not provide good micros() resolution beyond 10's of us.
So, starting ARM_DWT_CYCCNT to track the cycles since the last millisecond sys tick gave it resolution against typical 600 MHz clock.

T_LC doesn't have the ARM_DWT_CYCCNT though all other T_3.x's do. And there was never a 'system' need to enable it like the T_4.x.

Not sure there is a reason it couldn't be done on reset for T_3.x's, but that's how it is - and why T_4.x has it running.

 

[Mcu32]

Hi

Why is ARM_DWT_CYCCNT running default on Teensy 4.x and not on Teensy 3.x?

Simple. It's not needed by the firmware on T3. You can enable it, of course.

 

[PaulStoffregen]

Are there disadvantages on having the following code in setup by default?

Teensy LC lacks the ARM DWT hardware. An #ifdef check would be needed to not compile it with Teensy LC.

 

[AlainD]

Teensy LC lacks the ARM DWT hardware. An #ifdef check would be needed to not compile it with Teensy LC.

I know it doens't run on LC, because absent in the CPU.