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# Thread: Maximum toggling frequency teensy 4.1

1. ## Maximum toggling frequency teensy 4.1

Hi Guys, maybe it was already tested and someone could give to ma an answer so, qhat is the maximus toggling frequency of the teensy 4.1?
i need to generate a pulse signal with a frequency that could vary between 100Hz and 10kHz , but i need generate a pulse pulse width of 2n-10ns (so it means a toogling frequecy between 250-100MHz).
It is possibile to do this with the teensy 4.1? (otherwise i think i need to switch to and FPGA with a 200 mHz clock or rise the base frequency syntetysing an internal PLL)

Also what is the maximum frequency for the ADC? I expected to reach at least the 600k/1m of arduino due.

2. Originally Posted by Catan
Hi Guys, maybe it was already tested and someone could give to ma an answer so, qhat is the maximus toggling frequency of the teensy 4.1?
i need to generate a pulse signal with a frequency that could vary between 100Hz and 10kHz , but i need generate a pulse pulse width of 2n-10ns (so it means a toogling frequecy between 250-100MHz).
It is possibile to do this with the teensy 4.1? (otherwise i think i need to switch to and FPGA with a 200 mHz clock or rise the base frequency syntetysing an internal PLL)

Also what is the maximum frequency for the ADC? I expected to reach at least the 600k/1m of arduino due.
I think the PWM is clocked at F_CPU/4, which would be 150 MHz, so you should be able to produce pulse widths down to about 6-7 ns at 10 kHz or 100 kHz. Give it a try.

If you google "Teensy 4 ADC Sample Rate", you will find many threads on this topic. This one has a working program for 1MS/s.

3. Originally Posted by joepasquariello
I think the PWM is clocked at F_CPU/4, which would be 150 MHz, so you should be able to produce pulse widths down to about 6-7 ns at 10 kHz or 100 kHz. Give it a try.

If you google "Teensy 4 ADC Sample Rate", you will find many threads on this topic. This one has a working program for 1MS/s.

Hi Joe, great idea, i didn't think to use an internal signal with a slow frequency to "trigger" a single pwm pulse.
i see that the teemsy si overclockable, up to 900M (maybe there is some step in the mean? 750M will be fine so i can generate 5ns pulses, so if the application need i can let choose the user to do a pulse of 5ns or 10ns, even if 900M will be great and give a 3.3-6.6-9.9ns pulses).
btw i see also that pwm have a configurabile bit betten 2 an 16, i don't need to drive some sort of step motor, i just generate a signal that is 0 or 3.3V, so maybe reducing the resolution to 2bits resolution it is possibile to speed up the things.

4. Originally Posted by Catan
Hi Joe, great idea, i didn't think to use an internal signal with a slow frequency to "trigger" a single pwm pulse.
i see that the teemsy si overclockable, up to 900M (maybe there is some step in the mean? 750M will be fine so i can generate 5ns pulses, so if the application need i can let choose the user to do a pulse of 5ns or 10ns, even if 900M will be great and give a 3.3-6.6-9.9ns pulses).
btw i see also that pwm have a configurabile bit betten 2 an 16, i don't need to drive some sort of step motor, i just generate a signal that is 0 or 3.3V, so maybe reducing the resolution to 2bits resolution it is possibile to speed up the things.
The API for PWM includes analogWriteResolution, analogWriteFrequency, and analogWrite. I did a test using T4.1 pin 2, which uses a FlexPWM channel, and the following program, which sets up 100 kHz PWM. With a clock of 150 MHz, the PWM period is 150M/100K = 1500. By trial and error I found that if I use Resolution=10 bits and duty cycle = 1, I get the desired 1-clock pulse width., which is about 6 ns. This is close to the limit of my logic analyzer, so I didn't test with overclocking, but at 800 MHz you should be able to get a 5-ns pulse, and at 1000 MHz, you could get 4-ns.

Code:
```void setup() {
analogWriteFrequency( 2, 100000 );
analogWriteResolution( 10 );
analogWrite( 2, 1 );
}

void loop() {
}```

5. As with ordinary computers, overclocking Teensy 4 requires cooling to dissipate the extra heat, and even with the best cooling the combination of higher internal voltage and temperature can shorten the chip's life span.

6. Originally Posted by joepasquariello
The API for PWM includes analogWriteResolution, analogWriteFrequency, and analogWrite. I did a test using T4.1 pin 2, which uses a FlexPWM channel, and the following program, which sets up 100 kHz PWM. With a clock of 150 MHz, the PWM period is 150M/100K = 1500. By trial and error I found that if I use Resolution=10 bits and duty cycle = 1, I get the desired 1-clock pulse width., which is about 6 ns. This is close to the limit of my logic analyzer, so I didn't test with overclocking, but at 800 MHz you should be able to get a 5-ns pulse, and at 1000 MHz, you could get 4-ns.

Code:
```void setup() {
analogWriteFrequency( 2, 100000 );
analogWriteResolution( 10 );
analogWrite( 2, 1 );
}

void loop() {
}```
Today i got my T4.1, can't wait to prove it.
Btw if i do something like a counter?
ie

PORT = 0x01;
for(int i=0;i<100000;i++)
{PORT = 0x00;}

i know that maybe some graph isn't in the right place but i just write to give the idea. So using the digital port, ask to be "on" for 1 step (o configurable 2-3-4 steps as i need) and leave the port to 0 for the X number count that i need to generate the desired frequency.
in this case i expected that the open and close the digital port is just 1 clock cycle, and wait as i need (jut to evaluate how cycle it needs for the "for") instruction.

7. Originally Posted by PaulStoffregen
As with ordinary computers, overclocking Teensy 4 requires cooling to dissipate the extra heat, and even with the best cooling the combination of higher internal voltage and temperature can shorten the chip's life span.
yes for sure i will place at least and alluminum heatspread over the chipset if i need to overclock it a little bit.

8. Originally Posted by Catan
Today i got my T4.1, can't wait to prove it.
Btw if i do something like a counter?
ie

PORT = 0x01;
for(int i=0;i<100000;i++)
{PORT = 0x00;}

i know that maybe some graph isn't in the right place but i just write to give the idea. So using the digital port, ask to be "on" for 1 step (o configurable 2-3-4 steps as i need) and leave the port to 0 for the X number count that i need to generate the desired frequency.
in this case i expected that the open and close the digital port is just 1 clock cycle, and wait as i need (jut to evaluate how cycle it needs for the "for") instruction.
Feel free to try it, but keep in mind a few things. You assignment statements may require more than one clock cycle, and they won't always get the same result due to the complexity of the processor (cache, etc.). Also, think about the difference between using PWM and bit-banging. Once you configure the PWM, it is accurate to one timer clock and it requires 0% of the CPU. Bit-banging as you describe consumes 100% of the CPU. Is that what you want?

9. sorry for the late reply i try it on last thursday. Bit banging work for cycle use 2 clock cycles so i archive the goal with default clock of 600Mhz the minimum step is 1.6ns, setting the "hi level" to 3 step i got the pulse of 10ns (10.6) and setthing the "low level" to 29XXX i got a freuquency of 10 kHz.
Overclocking slightly the cpu to 800mhz i got 1.25ns step and with 4 step of high level i got the precise 10ns.
Btw i didn't think that cpu will be always to 100% (even if it is always counting something). If i have some spare time in this week i will try the pwm

10. Originally Posted by Catan
Btw i didn't think that cpu will be always to 100%
Microcontrollers are much less complex that computer CPU's, they benchmark much more consistently - being tied to hardware (hard real-time constraints) means adaptive clock speed is more problem-shaped than solution-shaped (especially for ISRs) Microcontrollers are typically run at one clock rate (when not in sleep-mode), and are expected to be rock-solid reliable at the task they are programmed for.

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