Question on acquiring high speed external ADC data through SPI and USB bridge

[icarux]

Dear all,

I am working on a project (industry) that requires acquiring data from an external ADC (16bit, 500kSps or 1MSps) through SPI and transfer it over to USB.
The ADC sampling event is triggered from an external pulse so we would need to feed a synchronized signal from the MCU to the ADC.
Instead of using an FPGA, I am considering Teensy 4.0 to see if it can do the job.

- ADC requires a 0.5MHz/1MHz synchronized pulse that would initiate the conversion job (~300ns).
- With the above synchronized pulse, the SPI transfer (CS low) has to happen after 300ns.
- Within 700ns~1.6us in every 2us/1us, we need to read/write at least 16bit data.
- The data received from the SPI has to be transferred to USB at the same time. A buffer might do the trick but SPI has to happen continuously.


The SCK of Teensy seems fast enough (I can probably use dual SPI if necessary) but I have some concerns that we would not be able to trigger SPI transfer every 2us/1us. (I wasn't able to find information about this.)
Aside from that, synchronization is another problem since I need to provide the ADC with a quite accurate clock for a constant sampling rate.

I know this might be too much but has anyone worked on a similar project or know if the above mentioned features would work?
FPGA would do the trick but I am looking for a way to reduce the fabrication cost and if Teensy can do the job, I am a happy man.

PS. I have never worked with Teensy before.

 

[AndyA]

The interrupt latency should be in the 100s of ns region so if you set the sync pulse as an interrupt and made that higher priority than the USB interrupt you should be able to trigger the SPI with the required timing.
Does the DAC have a data ready signal? If so then using that to trigger the SPI would probably work better than waiting 300ns after the sync pulse.
Or if you can control the sync pulse make it 350ns long and use the opposite edge to trigger the SPI.

It may also be possible to do this using DMA which would reduce the CPU load significantly but I don't know that area well enough to say for certain whether this is an option.

Once you have the data in a buffer the total data rate isn't too bad so I wouldn't expect any issues sending that over USB in blocks.

In short, should be possible but I've not done it so can't be 100% sure. It sounds tight enough that you will need to take care and code things well but there are a couple of ways to approach it.

 

[clinker8]

I think SPI should be able to do this.

However, I ended up just implementing a parallel interface for all 16 bits. This is possible with a Teensy 4.1, but not a Teensy 4.0. With a Teensy 4.0, you can do a byteswap (8 bits at a time), but the ISR is longer. The External ADC (AD7667) can sample to 1 MSPS.

Used HW PWM to trigger the conversion, and BUSY falling edge as an interrupt. When BUSY goes low, the conversion is complete. Seems to work great and isn't prone to timing issues. Tested at various frequencies from 200 KSPS to 1 MSPS without any issue. The basic risk for me was getting it to work the first time on a PCB. It's a lot more painful to layout all the traces, but the frequencies involved are a lot lower, so the end probability of success is greater. You may not make the same tradeoffs as I did, but I had a complicated analog front end, and I was trying to minimize the overall risk.

 

[icarux]

Thank you all for sharing your experience.

I am considering a similar ADC from Analog Devices and yes we have the same BUSY pin.
Sounds like Teensy is a right solution.
I'll order Teensy 4.1 rightaway!

 

[clinker8]

Thank you all for sharing your experience.

I am considering a similar ADC from Analog Devices and yes we have the same BUSY pin.
Sounds like Teensy is a right solution.
I'll order Teensy 4.1 rightaway!

Please be advised that getting the full 16 bits of performance from the ADC is not easy. Follow the manufacturer's guidelines (to the letter) to get all 16 bits worth, especially with filtering supplies and recommended grounding layout. It matters a lot! Good luck. It's not uncommon (with many first designs) to only get 12-13 bits out of a first layout. It takes attention to detail to get the very lowest noise levels of the order of 1.6 counts RMS.