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Thank you tni, that solved it. I will be looking more closely at the differences between his code and yours and I will let everyone know if I see anything interesting. For now here is a working example of 2 Channel DAC using DMA and FIFO. I added a sine and saw wave LUT for debugging at higher...

I am trying out the jitter free example. I do not understand where the actual sample frequency is coming from SIM_SCGC6 |= SIM_SCGC6_PDB; // enable PDB clock PDB0_SC |= PDB_SC_PDBEN; // enable PDB PDB0_SC |= PDB_SC_TRGSEL(15); // SW trigger PDB0_SC |=...

Any idea why using dma2.triggerAtTransfersOf(dam1) would cause neither dma channel to work?

Good information both of you. I am just starting to read through the K66 manual. Thanks.

Just as a note about the low frequencies being off. It appears to be spot on (error around .01%) between 7.19 and 78.125 Hz (PDB_PERIOD's of 65,188 and 6,000 ticks each) but frequencies below this are off wildly. I believe there is an overflow error. And sure enough if I go one tick past 65535...

As uploaded PDB is set to update the DAC value every 47 ticks of F_BUS (which for my teensy 3.6 @ 180 Mhz is I believe 60 Mhz) which for 128 samples per cycle (output sine wave cycles) should produce (60 M ticks/second) / (47 ticks/sample * 128 sample/cycle) = 9973.404 cycles/sec ~ 10Khz On my...

Thanks Thanks Paul. I know you have done a lot of work to make things as friendly, bulletproof, and usable as possible. I looked at the audio library and I think I get the gist but there is still a bunch of stuff that I dont know exactly what it is doing. Additionally I do not see anything...

I should probably preface this by stating that I am relatively amateur when it comes to microprocessor and low level programming languages so bear with me. I am trying to stream data from the computer to some kind of DAC and I would like to be able to do 4 channels at 1Msps for 8 seconds. This...

Okay so I got to play around with things a little this weekend. #define CPU_RESET_CYCLECOUNTER do { ARM_DEMCR |= ARM_DEMCR_TRCENA; \ ARM_DWT_CTRL |= ARM_DWT_CTRL_CYCCNTENA; \ ARM_DWT_CYCCNT = 0; } while(0)...

Got the board and some other things last night. Put the headers on but didn't get a chance to mess with anything. HOLY CRAP THESE THINGS ARE SMALL! You don't really appreciate it until you hold it in your hands.... Hopefully I should have an update soon.

Yes an FPGA would be a better solution but is well outside my expertise, we do not have someone available with that knowledge. I intend to demonstrate feasibility using the teensy, then if people are happy I would use a purpose built event timing chip like the TI or ACAM TI THS-788 -...

Not sure the difference in setup from Arduino Mega to Teensy 3.6 but this would lead me to believe that the digital read is likely faster. Possibly because it has circuitry more or less like a flip flip doing the digital discriminating which is what my low latency discriminator circuit would be...

0 or 1 more or less being the definition of binary digital systems yeah it would be. Of course having said that I do recognize that even the digital signal is in truth analog with a quick and consistent rise time (hopefully), and that the front end of the teensy is threshold detecting to...

If I understand correctly you are saying that it would be possible to achieve 120 bus speed on the interrupts? Would this possibly be more consistent? If I were able to achieve +/- 2 bus cycle accuracy it might still be tolerable and I will probably try it both ways for the hell of it. For the...

Can you explain the comment on the EEPROM and counting? I am not sure why I would need to write to EEPROM while counting cycles. I can see how it might be nice to have that redundancy if something failed but if it affects timing it would be better to just forgo writing to EEPROM or some other...

It is effectively a static measure with post response readout to a screen and probably write to SD card. I'll be honest while interesting and I will read through it at length. My first quick read of the ARM notes just gave me an idea of roughly how much latency could be expected. I do not...

Interesting link. Thank you for sharing. This is what I was afraid of. 12 cycles would push the error intolerably high. But if it were always a offset by a given amount, or offset over a repeatable amount given certain parameters.... as...

Based on https://forum.pjrc.com/threads/28039-Teensy-3-1-time-accuracy leads me to believe that micro frequency error is on the order of ppm where I was assuming full percents previously, making it for my purposes largely negligible. How much trigger jitter can I expect? Right now in my model...

Hello all, I apologize if this question comes off as ignorant but I am relatively inexperienced with micros etc. I have minimal experience using Arduino. I am working on a fast event timing circuit for time of arrival during hypervelocity events. I am interested in using a Teensy 3.6 as with...