I'm using a EEPOT and an AD9833, both SPI, but requiring different setups:
SPISettings POT_SPI(2000000, MSBFIRST, SPI_MODE0); // clk idle low, rising edge
SPISettings DDS_SPI(5000000, MSBFIRST, SPI_MODE2); // clk idle high, falling edge
If I communicate with the EEPOT (which leaves the clock idling low) and then switch to talk to the AD9833, I find that the data is not received correctly. An example call:
void toneOff(void)
{
I find that after I change settings, the clock idle polarity is not changed until after the chips select goes active. The AD9833 requires that the clock be in the proper state (high) before chip select goes active. If I make the call twice (without the workaround), the second call works, since the first call leaves the clock idling high. The workaround is to do a dummy transaction (as shown above) before asserting chip select. It would seem that a setting change would make the hardware update right away. I could not find anything in the CPU reference to verify or refute this. Perhaps it is an idiosyncrasy of the AD9833 that requires proper clock polarity before chip select? Does (or should) SPI.beginTransaction() update the hardware right away?
SPISettings POT_SPI(2000000, MSBFIRST, SPI_MODE0); // clk idle low, rising edge
SPISettings DDS_SPI(5000000, MSBFIRST, SPI_MODE2); // clk idle high, falling edge
If I communicate with the EEPOT (which leaves the clock idling low) and then switch to talk to the AD9833, I find that the data is not received correctly. An example call:
void toneOff(void)
{
SPI.beginTransaction(DDS_SPI);
SPI.transfer(0xff); // WORKAROUND: dead transfer to get clock idle level set right
digitalWrite( DDSCSpin, LOW);
SPI.transfer16(0x20c0); // use reset to turn off
digitalWrite( DDSCSpin, HIGH);
SPI.endTransaction();
}SPI.transfer(0xff); // WORKAROUND: dead transfer to get clock idle level set right
digitalWrite( DDSCSpin, LOW);
SPI.transfer16(0x20c0); // use reset to turn off
digitalWrite( DDSCSpin, HIGH);
SPI.endTransaction();
I find that after I change settings, the clock idle polarity is not changed until after the chips select goes active. The AD9833 requires that the clock be in the proper state (high) before chip select goes active. If I make the call twice (without the workaround), the second call works, since the first call leaves the clock idling high. The workaround is to do a dummy transaction (as shown above) before asserting chip select. It would seem that a setting change would make the hardware update right away. I could not find anything in the CPU reference to verify or refute this. Perhaps it is an idiosyncrasy of the AD9833 that requires proper clock polarity before chip select? Does (or should) SPI.beginTransaction() update the hardware right away?