Teensy 3.6 Ethernet Shield

Status
Not open for further replies.
C

cymaspace

Well-known member
Hi Paul,
I am looking for datasheet / tech info regarding the Ethernet shield (prototype?) that came with the Teensy 3.6 Kickstarter reward. I am not seeing any info on your website so any info would be helpful!
 
manitou said:
Only a limited number built, here is PCB and parts list
https://www.oshpark.com/shared_projects/Y2JckjhM

Various beta test results at https://forum.pjrc.com/threads/34808-K66-Beta-Test?p=109161&viewfull=1#post109161
Click to expand...

Thank you @manitou. Couldn't for the life of me find info as most other threads are related to the more readily Wiz shield. I'll contribute to your original thread any findings / implementations that may be helpful. Wonder if there are plans to build more?
 
Additionally, we are going to be stacking the Teensy 3.6 Ethernet shield with the Octo Sdapter and Audio adapter. Has there been any pin conflicts or issues with this setup? Figured I'd ask and be prepared before we run into something presenting major issues.
 
If using the normal wiznet 820 or 850 ethernet, make sure you have Teensyduino 1.41, because you'll need to use the alternate SPI pins. A bug was recently fixed where the ethernet lib wasn't probably using the alternate SPI pins. If you still have an older version installed, you'll almost certainly hit that bug.
 
Erin & I hand soldered 84 of those experimental native ethernet boards. No more! But if you really want to make one you can get all the info from that link Manitou gave.
 
PaulStoffregen said:
Erin & I hand soldered 84 of those experimental native ethernet boards. No more! But if you really want to make one you can get all the info from that link Manitou gave.
Click to expand...

Not only that, we're gonna solder a bunch of those audio codecs too! And 0402 resistors!! It's gonna be a party.
 
NB: you'll probably want to use series termination on the RMII lines in the future. I've had EMI compliance issues with the LAN8720 with an unterminated clock line; 100 ohms of series resistance cleared it right up. I'd also strongly recommend a 4-layer design, at 50 MHz a solid groundplane is a good idea. Paul, any idea how signal integrity is between the PHY and the ARM with this board? I worry about ground integrity through the pin headers and onto the Teensy.
 
Status
Not open for further replies.
Back
Top