I thought I do this already with this piece of code, don't I?
Code:
interrupts();
NVIC_ENABLE_IRQ(IRQ_CAN_MESSAGE);
attachInterruptVector(IRQ_CAN_MESSAGE,tester);
Maybe let me outline this in a bit more detail.
The last line assigns a function to an interrupt/exception. At the lowest level there is an exception/interrupt vector table, which is managed by the library code you are using; in the end, if the CAN message IRQ gets triggered, your function will be called.
The second line enables the CAN message interrupt in the NVIC. This NVIC is there to handle all things exception/interrupt related, i.e. you can assign priorities, you can enable/disable specific exceptions/interrupts etc. The least you have to do is to enable an interrupt in the NVIC so it reaches the actual ARM core.
The first line is in the end nothing else than saying "enable all interrupts", i.e. there are ways to block/unblock close to all interrupts/exceptions for special needs. Except for the core exceptions, "all" means "all these enabled in the NVIC". The others will never make it through the NVIC in the first place.
So far, all that is important and you have it done properly. What is missing? The source of the interrupt! In your case, this is the FlexCAN controller, which has to trigger the interrupt. To do so, you have to the tell the CAN controller to (a) actually trigger interrupts and (b) on what conditions it should trigger an interrupt. This must be configured in the CAN controller itself. Grab the reference manual and check for the part I referenced in my earlier post, read up on the stuff and then configure the CAN controller to your needs. Once that is done, you should see the interrupt actually getting triggered and your tester() function called