I missed all these updates, been running around all kinds of places the past week.
I am sooo happy to see that the project is alive and well. This is really engaging the people of this community.
Absolutely wild, great work everyone! :love:
I only used it briefly before taking a different direction for my project
But here is the code
https://forum.pjrc.com/index.php?threads/build-a-teensy-based-cdj-can-it-be-done.75232/post-349741
I now added whole teensy areas of Arduino15 to the don't scan so now it builds.
Not sure if you picked up the flexio changes or not, should probably look....
For those of us who are used to programming c++ back in the stone age, what new things...
HI All -
First - this is a awesome project with great results. Not the easiest hardware/software problems to solve!
We were contacted recently by @Dogbone06 about this project and if SparkFun would be interested. Our answer is absolutely...
@gigapod - Glad to see your interest in this project. A little background information and the state of the project at this moment. The WIFI card we used for testing was setup for WIFI only W/O Bluetooth being broken out. That may have changed...
This is the level shifter I used (but from AliExpress) and while I can read packages, Its not sending them nicely
But, I did get the components today to build out a logic level shifter based on the 75HC245, but the pullups were wired...
Master is a CDJ1000 mk3 panel
Mode3. MSB first. 27 byte long frame.
4 wires in total: MISO, MOSI, CLK and CS between 7-10cm long. I can't go any shorter.
Wired to SPI on the T4 via a logic level converter as the CDJ is 5v logic
CS->10 ...
@sicco hey
I've come back to the slave SPI stuff as I now have a newer CDJ panel that is configured as an SPI master
It has four wire setup which is wired to SPI on my T4.0
I've been playing around with tens of sketches using Claude generated...
@houtson this is quite amazing, am pleasantly surprised you got this to work!!
I haven’t tested it yet, but I have a few questions
1. I understand this supports only mono at the moment, would stereo be possible?
2. Are you able to estimate how...
I forked and did a rehash of the Stefan Bernsee/Duff2013 phase vocoder implementation.
This can now do time stretching and pitch shifting independently - both can run simultaneously - using a phase vocoder approach. I also added configurable...
It needs a mono, 44.1khz with no additional (meta) data in the header WAV file.
If you use FFMPEG, # ffmpeg -i original.wav -ac 1 -ar 44100 -c:a pcm_s16le -map_metadata -1 clean.wav
should clean up an original.
Hey Paul
I tested this
It's playing really slow, and the pitch is really low too. this is at 1.0f playback speed
I think the phase vocoder approach will be the only way do do this properly
@charnjit
Good that you have Granular effect running now. I have been following your various threads in the last week.
Your goal, to pitch shift/time stretch in professional audio quality, is one of the most complicated tasks in digital signal...
...well, that's my opinion!
TL;DR:
LittleFS - added one MRAM type and ability to use FlexIOSPI to access FRAM/MRAM chips, if you have
FlexIO_t4 - fixes for dealing with null buffer pointers
Longer explanation of the whats, whys and wherefores...
I think OP wants to be able to time stretch in realtime with variable playback speed.
One of the ways of doing this is via granular synthesis but they don’t always sound so great.
I’d be interested to see how this is achieved though.
A better...
It is often the case that our code doesn't work. Instead of debugging, whenever a crash or misbehaviour is detected, we could call the make_it_work() function and then run the code again, confident that our code will work the second time around...
Yes, @KurtE pulled DOCS and wrote code for 2nd SDIO usage as noted in p#79 - available WiFi chips are no longer SPI but SDIO.
An adapter placed into the SDIO SD card socket could also be used.
I had a version of this board that plugged into the SDcard slot on the T4.1. I can't recall correctly, but I think the INT GPIO might be optional, so that setup would only require a single additional GPIO pin, although obviously you can't insert...
SDIO has 6 pins - 4 data line, a clock line and a command line.
Two additional GPIOs are needed to control the sleep state and an interrupt trigger.
IIRC, the murata chip variant that was used for this project does not support SPI.
Those that do...
Not sure what you mean by "ports"? Do mean pins? As far as top speed usage, that depends on the application and is subjective. The pico is using one SPI port and the Teensy 4.1 is using one SDIO port out of two;)
One note is that I'm in the process of poking around to C++-ize the QNEthernet driver so that it's easier to change driver hardware on the fly without having to change #defined options. Having said that, the core functions a driver needs to...