sicco

See this example: https://forum.pjrc.com/index.php?threads/t4-adc-real-time-timer-triggered-with-dma-using-adc_etc.76129/

On why T4 SPI may not work as intended with the MCP3564: with the default Teensy SPI library implementation, in this SPI MODE, the MOSI level for the first bit is either 1 or 0, depending on what the the last bit in the last byte of a previous...

Here's another example for Serial (LPUART), 1 wire, DMA receive and transmit, background data buffers exchanging. Uses just 1 signaling wire in between two Teensy4's. So GND and this one LPUART TX pin is all that's needed. Can use either...

The slave likely gets 'out of sync' easily now because the SPI CS input gets more or less ignored. The code I shared just does 27 bytes for a transaction, but it no longer looks at CS rising edge. If the SPI clock fails to make it occasionally or...

Yes, but there are a few catches. Code that I had working for T4 master and T4 slave attached. (working as long as GND interconnect is short enough) Other issues were in the way you let the master immediately trigger a next transaction. With...

Only a true decent ground plane, or a very short GND wire in between the two Teensies makes it work reliably here on my bench. Very short means < 5 cm. Without that, I get spikes on the SPI CS line. Where that line hits the slave SPI CS input...

I managed to reproduce. Sometimes. There's something unexpected happening. It works only if I put just a bit of capacitive or resistive load on the SPI CS pin on the slave T4... What I think is happening is that due to poor ground plane...

Can you share a photo that shows what pins are the 4 SPI wires plus ground wire? This just to reassure master T4 MOSI and MISO link to slave “MISO“ and “MOSI”? Asking again, because you may have wired master SPI pins to exactly the same pins on...

Rezo, you now have a payload of 512 bytes. Your application i think needs 27 byte payloads? So why not leave Nbytes at 27? I’ve not had opportunity today to replicate your dual Teensy4.x setup and test. Can you share a photo that shows what pins...

Is the tx buffer 512 bytes long? Share the sketch and i’ll have a look.

Rezo, I see you've changed the buffer size to 27. It was 512 in the example. I think it must be a power of 2, and likely it must be 512 (2^9) for the T4_DMA_SPI_SLAVE class to work as intended. This is due to the way the DMA works, with auto...

I'm not quite sure that your above code is non-blocking. Looks like it waits with de-asserting SPI /CS pin until all 27 bytes have been read and written. So during that time, other code will not run? The idea behind the DMA SPI example that I...

But what will trigger the SPI transaction in the master? A timer?

Probably yes. Is your Teensy the SPI the master or the slave? For both i did a DMA based code examples. This thread is about the master i think. Is the 27 bytes payload to be transferred as first 27 bytes out and then 27 bytes in, or in and out...

Hello all, I am a first time user of the Teensy 4.1 board. I purchased it for a project I am tinkering with to hopefully measure 1-2 MHz signals with the built in ADC. So far, I have been trying my best to research how to increase the sampling...

The ADC produces 18 bit signed numbers. You will use 32 bit signed integers. When right shifting uint32 using >>14 the sign bit no longer will be sign bit. Use >>>14 instead.

Attached an example on how it can be done. In this example I was using several ST MEMS sensors, a Microchip RTC, and a MAQ473 sensor. Some using SPI1, some SPI0 (aka SPI) and some use SPI2. What you need from this zip is the T4_DMA_SPI*.* files...

Maybe you could try to fake a CS signal, for example with a one-shot 1 ms timer, triggered by an edge on your SPI CLK signal? I think all it needs is a CS rising edge as the indication that whatever happened before the rising edge is now a...

Not really. Without CS pin, there is no way to detect the start and end of a N byte transaction. So then we cannot really tell what N is. You could try manually pulsing what is the CS pin on the Teensy side, and then look at what it displays. If...

Sketch attached lets you synchronously sample at 12 bits resolution 4 channels with 500 kHz. Using Teensy4.x A0, A1, A2, A3 analog inputs. Channels A2 and A3 are sampled at the same time just a fraction of a microsecond or so later than A0 and A1...

Managed to get a more decent analog channels sampler working for Teensy4. It allows continuous streaming, dual channel synchronous sampling, at rates up to 1 Ms/s, 12 bits, into buffers as big as what fits in DMAMEM. Either 1, 2, 4 or 8 analog...