Hello all,
I have been doing some digging on this topic with mixed results. I hope to have 16 SPI devices controlled by one Teensy 3.2. Initially I planned to use a 16 channel analog mux/demux to select between my devices (using 4 DIO pins to manually address the devices) and define CS to be the same pin for all devices I'd be using, which is then connected to the signal input of the demux. All the outputs of the demux would be pulled high so that only one CS could be active at a time. I expected some settling time when switching between addresses/channels, which is fine because although I will update all 16 devices in short succession, I won't be doing much interacting with each device, I won't be updating them often (most of the time there will be no activity on the SPI bus), and timing of the group update isn't critical.
I can't really find a good source saying this is definitely possible or not possible, just suggestions of each case being true. Is the internal resistance of the mux/demux a problem? It seems like logic low will still be achieved when the Teensy pulls the signal pin low. Is the response time of the signal going low to the output going low going to mess up any devices' timing?
Is it a better idea to use a 4 to 16 decoder? I already have the mux/demux so I'm hoping that will work but I'm not sure. I will probably be testing this as soon as I have a chance but I'm looking for some feedback before I go too far down this road thinking that it's possible if it isn't. Thanks in advance!
I have been doing some digging on this topic with mixed results. I hope to have 16 SPI devices controlled by one Teensy 3.2. Initially I planned to use a 16 channel analog mux/demux to select between my devices (using 4 DIO pins to manually address the devices) and define CS to be the same pin for all devices I'd be using, which is then connected to the signal input of the demux. All the outputs of the demux would be pulled high so that only one CS could be active at a time. I expected some settling time when switching between addresses/channels, which is fine because although I will update all 16 devices in short succession, I won't be doing much interacting with each device, I won't be updating them often (most of the time there will be no activity on the SPI bus), and timing of the group update isn't critical.
I can't really find a good source saying this is definitely possible or not possible, just suggestions of each case being true. Is the internal resistance of the mux/demux a problem? It seems like logic low will still be achieved when the Teensy pulls the signal pin low. Is the response time of the signal going low to the output going low going to mess up any devices' timing?
Is it a better idea to use a 4 to 16 decoder? I already have the mux/demux so I'm hoping that will work but I'm not sure. I will probably be testing this as soon as I have a chance but I'm looking for some feedback before I go too far down this road thinking that it's possible if it isn't. Thanks in advance!