LPSPI: every byte transmission followed by unwanted clock repetition

BertG

New member
Hi,
we are using Teensy4.1 with a LPSPI connection to a WIZNET805IO (WIZNET5500 chip) module. For some reason every data byte sent (data bits and 8 clock cycles on the logic are ok, timing is perfect) is followed by another 8 clock cycles with MOSI staying at HIGH level which confuses the WIZNET. Using a bit-banger and simulating same data stream the WIZNET responds as expected. Probably a problem with the configuration of the SPI channel. We use SPI.h and SPI.cpp. Any ideas?
 
Wiznet W5500 works great with the Ethernet library, which uses SPI.h internally to talk to the hardware.

If you're creating your own library to talk to W5500, maybe look at the Ethernet library code.

Regarding the specific problem you mentioned, I have no idea. Many people have built successful projects using the Ethernet library. I personally test Ethernet WebClient example with Wiz850io on every Teensy release, so I'm confident it really does work.
 
Hi!

After endless hours or testing and digging deep (with no success) we kicked the WIZNET850IO off the board and replaced it with a simple Add-On PCB which sits on spot of the WIZNET module and provides a RJ45 (with magnetics) jack and "short" (*) connection to the Ethernet signal on TEENSY4.1. Using the native Ethernet lib all works very well.

It became finally clear that the TEENSY4.1 SPI signals are hardware-wise perfect (timing, level etc.) but the Ehternet lib elements in conjunction with the SPI lib elements obviously spits crap out the WIZNET chip cannot understand. All our trials with configuration changes failed and we did not want to spend project time by correcting library elements. Definitely no plug and play with the provided library elements.

(*) "Short": because EMC-testing failed with the standard Ethernet-Add-On board with the ribbon cable to the Jack. Additionally this board cannot be fixed to somewhere, quite useless...

I developed a similar board to compensate for the latter flaw. This board replaces the WIZNET850IO module (uses the 2x6 pins, as mechanical fixtures only). It is connected to the Ethernet port on the TEENSY4.1 by ribbon cable. If someon wants to replace the WIZNET module and has not to pass EMC-testing this is a stable low cost solution.

Attached picture
Front: empty PCB of standard TEENSY4.x Ethernet kit
Middle: redeveloped, with 2x6 pin header to place on spot of WIZNET on our board
Back: WIZNET850IO on our board...

Nevertheless we will check what you provided. Thanks so far!
 

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