MKL02Z32 required pins

S

sndsgd

Active member
I'm working on a custom PCB with SDRAM loosely based on @Dogbone06's deboard v5 and I'm trying to decipher exactly which MKL02 pins are required for a teensy 4.x compatible pcb.

The pin in question is `PTA1/IRQ_1`, which routes to the iMXRT1062's `GPIO_EMC_01` in the schematic on pjrc.com:
teensy-MKL02Z32.png


On the devboard it looks like the pin is left floating:
2024-07-21-101502-screenshot.png

2024-07-21-101433-screenshot.png


If I'm reading the datasheet correctly it looks like this pin is used for `RESET_b`, and given that it's unconnected on the devboard I'm assuming it's not required, but I'd like to get confirmation if possible.

Additionally, I'd like to confirm whether any other MKL02 pins are optional/not required to produce a teensy compatible custom pcb.
 
sndsgd said:
I'm working on a custom PCB with SDRAM loosely based on @Dogbone06's deboard v5 and I'm trying to decipher exactly which MKL02 pins are required for a teensy 4.x compatible pcb.

The pin in question is `PTA1/IRQ_1`, which routes to the iMXRT1062's `GPIO_EMC_01` in the schematic on pjrc.com:
View attachment 35144

On the devboard it looks like the pin is left floating:
View attachment 35145
View attachment 35146

If I'm reading the datasheet correctly it looks like this pin is used for `RESET_b`, and given that it's unconnected on the devboard I'm assuming it's not required, but I'd like to get confirmation if possible.

Additionally, I'd like to confirm whether any other MKL02 pins are optional/not required to produce a teensy compatible custom pcb.
Click to expand...
DEBUG_EN is not used currently, but there is no assurance if it will or will not be used in the future. So do yourself a favor and connect it.
 
Dogbone06 said:
DEBUG_EN is not used currently, but there is no assurance if it will or will not be used in the future. So do yourself a favor and connect it.
Click to expand...
My main hesitation around connecting it is that I don't know if doing that will have some sort of impact on the sdram functionality. This snippet from the hardware design guide is what is causing my anxiety:
Code: 
The SDRAM interface (running at up to 166 MHz) is one of the critical interfaces for the chip routing.
The controlled impedance for the single-ended traces must be 50 . Ideally, route all signals at the same
length as the EVK board. See the RT1050-EVK layout to route all signals at the same length (±50 mils).

In addition to that, it is not clear what this particular pin is responsible for. Looking at the datasheet (note: unsure exactly which version PJRC uses, so I'm not entirely sure if that is the correct datasheet), I cannot determine why it is labeled `DEBUG_EN` in your design, as it appears to be used for `RESET_b` or `TPM_CLKIN0`.
View attachment 35182
Given the above uncertainty, and the fact that your design works as is, I'll probably just leave it unconnected unless @Paul chimes in with more information about which MKL02 pins are actually required and what they do.
 
In cases like this, I often look at the most recent products with the schematic. With the T4.x it is the Sparkfun MicroMod
If you look at their Schematic:
1721667963488.png

1721668006176.png

So probably why they have the label DEBUG_EN
 
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