Are the boolloadre chips compatible with MKL26Z64VLH4?
- Thread starter yeahtuna
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what's the difference between VLH and VFT?
The package is different. Looks like the number of io pins is different too. I'm guessing it won't work.
My guess is it should work, because the peripherals are the same, and the bootloader chip just needs a connection to the reset and debug pins.
Look at the schematic for how the MKL02 connects; it's three pins:
As long as the memory map (including peripheral addresses for USB and flash) are the same, I believe it should work.
Look at the schematic for how the MKL02 connects; it's three pins:
As long as the memory map (including peripheral addresses for USB and flash) are the same, I believe it should work.
We have to see what Paul says, but as long we do not know, how he identifies the MCU and to which detail, it is hard to say.
My hunch is that the two chips present them self to the outside world the same way so the MKL02 cannot differentiate, so it could work.
PaulStoffregen
Well-known member
Odds are good it will work, but this hasn't been tested. You'll just have to give it a try to find out. If it doesn't work, I'm not going to update the bootloader to support it. Officially, the chips used on Teensy LC, 3.2, 3.5 and 3.6 are the only ones supported. Anything else is "unofficial" and "unsupported". Well, except I do try to answer questions like this sometimes, if you could call that "support"....
I can tell you the bootloader looks first at the ARM CPUID register at 0xE000ED00, to learn whether the CPU is Cortex M0+ or M4. In the case of M0+, very little extra checking is currently done, because only one M0+ chip is supported at this time. It's likely to work on other chips with the same FTFA flash controller and similar memory size. However, I can not promise the bootloader will always remain this way. While I don't currently have plans to support another M0+ chip, of course PJRC could end up making another product with M0+ at any point in the future.
I can tell you the bootloader looks first at the ARM CPUID register at 0xE000ED00, to learn whether the CPU is Cortex M0+ or M4. In the case of M0+, very little extra checking is currently done, because only one M0+ chip is supported at this time. It's likely to work on other chips with the same FTFA flash controller and similar memory size. However, I can not promise the bootloader will always remain this way. While I don't currently have plans to support another M0+ chip, of course PJRC could end up making another product with M0+ at any point in the future.
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