SPI DMA with double data rate

O

onezero

New member
Hello,

I currently have a T4.1 project that communicates to a device over SPI using DMA, freeing up the uC to other tasks during SPI transfers, using the following from the standard Teensy SPI library:

Code: 
 SPI.transfer(outBuf, returnBuffer, count, event);

This works well, but I'm looking to upgrade the device (a rather esoteric medical part) to the next model in the device family.

However, this next model uses a non-standard SPI protocol: it features a "double data rate" by making data available on both the rising edge and the falling edge of SCLK. The last data bit is then made available on the rising edge of CS. All the other timings (MOSI, CS, and SCLK) remain standard.

This feels like it should be in the realm of possibility to implement with DMA, but I'm not really sure where to start -- any pointers? I've been reading through DMAChannel.h but I feel a little out of my depth with some of it.

Thanks in advance!
 
Sorry, I could be wrong, but my guess is it might be difficult to do with normal SPI.

That is the TCR register has field in it for clock phase, which is either leading or trailing edge. I don't see option for both.

Might be able to do so with the FlexIO. I did a rudimentary SPi object with it a long time ago. Forgot most everything... Maybe others have ideas on
how to accomplish this.
 
FlexIO with two timers - one ticking at double the clock rate (since shifting can only be done on a rising or falling edge) and the other generating the actual clock.
 
What speed is this SPI? Is there a datasheet for the device? If its not superfast you could just use a 74LVC74 DQ latch to halve the outgoing SCLK frequency, with #CS to set or reset it as appropriate.
 
MarkT said:
What speed is this SPI? Is there a datasheet for the device? If its not superfast you could just use a 74LVC74 DQ latch to halve the outgoing SCLK frequency, with #CS to set or reset it as appropriate.
Click to expand...

The speed is 24Mhz. I briefly tried setting the clock speed to 48MHz to see if the T4.1 is fine with that; waveform looks a little curvy but it might work, especially if the flip-flop is very close to the uC.
 
64LVC will handle 50MHz I believe - but layout will be important, short direct wiring for clock and for ground essential, decouple the flip flop!
 
A bit too late probably, but here's another potential workaround: use one Teensy SPI port as the SPI master, and use another Teensy SPI port in slave mode. Interconnect their SCK, MISO and CS signals. Set their SPI MODESs so that one port clocks in the MISO level at rising clock, the other at the falling master SPI clock. Assuming this 'odd medical' device throws out 16 bit words in 8 clocks, you will get one Teensy SPI port reading its received byte with the medical device's word b15, b13, b11, b9, b7, b5, b3, b1 and the other one will read b14, b12, b10, b8, b6, b4, b2 and b0. Those bits you will then need to reshuffle later on to get a decent 16 bits word again in the Teensy application code.
Also that final bit just before CS de-asserts probably needs a manual read.
 
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