PaulStoffregen
Well-known member
That's the expected result if you have one PSRAM chip. To get the last test to print the same number, you need to have 2 PSRAM chips installed.
That's the expected result if you have one PSRAM chip. To get the last test to print the same number, you need to have 2 PSRAM chips installed.
Also may have to change the ILI9488_t3 library on detecting if it should use extram or not.
EXTMEM volatile int myint;
extern "C" uint8_t external_psram_size;
void setup()
{
while (!Serial) ;
Serial.println("External RAM test");
Serial.printf("PSRAM size is %d Mbyte\n", external_psram_size);
myint = 123456;
Serial.printf("myint = %u\n", myint); // reads from cache
arm_dcache_flush_delete((void *)&myint, sizeof(myint)); // write cache to memory
Serial.printf("myint = %u\n", myint); // reads from actual memory
volatile int *pint = (volatile int *)0x707FDCB4; // near end of first 8MB chip
*pint = 12345678;
Serial.printf("*pint = %u\n", *pint); // reads from cache
arm_dcache_flush_delete((void *)pint, sizeof(int)); // write cache to memory
Serial.printf("*pint = %u\n", *pint); // reads from actual memory
pint = (volatile int *)0x70CFDCB4; // near middle of second 8MB chip
*pint = 6541230;
Serial.printf("*pint = %u\n", *pint); // reads from cache
arm_dcache_flush_delete((void *)pint, sizeof(int)); // write cache to memory
Serial.printf("*pint = %u\n", *pint); // reads from actual memory
}
void loop()
{
}
I've added a C namespace variable to the startup code, so software can check how much PSRAM is actually installed.
https://github.com/PaulStoffregen/cores/commit/a41500ec8eba072749d2e6c1bed48081dda8d39b
Here's the test program updated to print the PSRAM size.
.....….
// turn on clock (TODO: increase clock speed later, slow & cautious for first release)
CCM_CBCMR = (CCM_CBCMR & (CCM_CBCMR_FLEXSPI2_PODF_MASK | CCM_CBCMR_FLEXSPI2_CLK_SEL_MASK))
| CCM_CBCMR_FLEXSPI2_PODF(7) | CCM_CBCMR_FLEXSPI2_CLK_SEL(0); // 49.5 MHz
CCM_CBCMR = (CCM_CBCMR & ~(CCM_CBCMR_FLEXSPI2_PODF_MASK | CCM_CBCMR_FLEXSPI2_CLK_SEL_MASK))
| CCM_CBCMR_FLEXSPI2_PODF(4) | CCM_CBCMR_FLEXSPI2_CLK_SEL(2); // 528/5 = 132 MHz
External RAM test
PSRAM size is 8 Mbyte
myint = 123456
myint = 123456
*pint = 12345678
*pint = 12345678
*pint = 6541230
*pint = 4294967295
// TODO: zero uninitialized EXTMEM variables
// TODO: copy from flash to initialize EXTMEM variables
// TODO: set up for malloc_extmem()
The motivation for these changes is the pattern of orders we're seeing people place. It's pretty clear many people are buying 2 PSRAM chips to pair with each Teensy 4.1.
Guess so but just saw your notes:
Does this actually mean, i can place two ram chips on the teensy 4.1 instead of 1 ram and 1 flash?
Currently you have the psram clock at 49.5 Mhz
Got itYes, I know, but for this release I want to leave the clock at this most conservative setting. We just shipped a lot of hardware to distributors and end users, so I'm feeling overly cautious right now.
My general plan is to release 1.53 in about 4 to 6 weeks. There's so much that's been put on hold, like the hardware serial fifo latency issue. I want to merge & implement as much as possible over the next few weeks. So we won't be on 1.52 for the normal ~3 months.
Yup. 1.52 needs to release ASAP, so all that stuff is going to be left until 1.53.
Yes. You can use 2 RAM chips for 16 MB.
Removed the PSRAM initialization from the library and now FLASH is not working. Going to have to sort that out.
@defragster - typically you use the accelerometer just to get the roll and pitch angles. Did see a tech note on getting yaw https://www.nxp.com/docs/en/application-note/AN3461.pdf never really tried it with just an accel.
Thanks Paul, but my issue is more that I want to compile the library differently depending on if their is external memory. The current hack is, in theI've added a C namespace variable to the startup code, so software can check how much PSRAM is actually installed.
https://github.com/PaulStoffregen/cores/commit/a41500ec8eba072749d2e6c1bed48081dda8d39b
Here's the test program updated to print the PSRAM size.
#if __has_include(<extRAM_t4.h>) && defined(ARDUINO_TEENSY41)
//#include <extRAM_t4.h>
#define ENABLE_EXT_DMA_UPDATES // This is only valid for those T4.1 which have external memory.
//#pragma message "ILI9488_t3h - extRAM_T4 enabled EXT DMA frame buffer"
#endif
Any benchmark of external flash and PSRAM, by the way?
from DTCM 15 us
from OCRAM 55 us
from PROGMEM 558 us
from 0x70000000 ERAM 1115 us @49.5MHz 780 us @132MHz about 336 mbs
from 0x71000000 EFLASH 1905 us @49.5MHz 780 us @132MHz
Will we have the SPIFFS stuff in 1.52 or will it be still a separate library?
I am wondering for 1.53, whether we need a class that sits between the audio readers (i.e. RAW, WAV, etc.) and the actual filesystem (SD, SD-Fat Beta, SPIFFS, SerialFlash, etc.). That way, you can easily slide in new filesystems without having to make new versions of the readers.
...
Just tested with the PSRAM code removed from lib and just using the initialization from startup - it makes a noticeable difference!
Here are some times for memcpy() for 32KB from various memories (data is aligned(32) but NOT cached) to DTCM.
FLASHMEM void configure_external_ram()
{
#if ! defined(TEENSY41_EXCLUDE_EXTERNAL_RAM)
// initialize pins
IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22 = 0xB0E1; // 100K pullup, medium drive, max speed
...
AFAIK - SPIFFS and eFlash access are going to be external. The startup activate of PSRAM was on Paul's list to enable - as new to B5 there won't be further integration or test before TD 1.52 releases for arrival of new T_4.1's.
Future SD.h interface layer would be cool as is could be 10X faster.
@Paul - I know it is probably too late for this release of Teensyduino, but still wonder if it would make sense to add a simple heap allocater that can take in some indicator of which heap, maybe flags...
Maybe something like Windows HeapAlloc? Obviously for quick and dirty. Maybe have something like:
myMem = HeapAlloc(HEAP_EXTMEM, 0, count_bytes);
And don't have any implementations for free or the like. That way thing like libraries who wish to allocate buffers, can maybe simply call this if they know there is external memory and can grab a chunk without having to resort to some fixed address and hoping no else will need that address.
Again probably too late for this release.
2.23 malloc, realloc, free—manage memory
Synopsis
#include <stdlib.h>
void *malloc(size_t nbytes);
void *realloc(void *aptr, size_t nbytes);
void *reallocf(void *aptr, size_t nbytes);
void free(void *aptr);
void *memalign(size_t align, size_t nbytes);
size_t malloc_usable_size(void *aptr);
void *_malloc_r(void *reent, size_t nbytes);
void *_realloc_r(void *reent,
void *aptr, size_t nbytes);
void *_reallocf_r(void *reent,
void *aptr, size_t nbytes);
void _free_r(void *reent, void *aptr);
void *_memalign_r(void *reent,
size_t align, size_t nbytes);
size_t _malloc_usable_size_r(void *reent, void *aptr);
Just downloaded and installed the new core for Teensy4 and was running some tests as well. Just using your quick and dirty test sketch I get the following:
Not sure about that last value which should be a repeat of 6541230Code:External RAM test myint = 123456 myint = 123456 *pint = 12345678 *pint = 12345678 *pint = 6541230 *pint = 4294967295
EDIT: Just going through the lib as well seems that even though you have the psram initialization it still works with the initialization that is in the library.
Are you initializing all the FlexSPI2 LUTs you're using? The startup code is only programming the LUTs used for the RAM commands.
I'll take a look at the code this afternoon if it's still unsolved.
[COLOR="#FF0000"]FLEXSPI2_FLSHA1CR0 = 0x2000[/COLOR]; // 8 MByte
FLEXSPI2_FLSHA1CR1 = FLEXSPI_FLSHCR1_CSINTERVAL(2)
| FLEXSPI_FLSHCR1_TCSH(3) | FLEXSPI_FLSHCR1_TCSS(3);
FLEXSPI2_FLSHA1CR2 = FLEXSPI_FLSHCR2_AWRSEQID(6) | FLEXSPI_FLSHCR2_AWRSEQNUM(0)
| FLEXSPI_FLSHCR2_ARDSEQID(5) | FLEXSPI_FLSHCR2_ARDSEQNUM(0);
[COLOR="#FF0000"]FLEXSPI2_FLSHA2CR0 = 0x2000;[/COLOR] // 8 MByte
Yes, the main flash runs at a low speed, too (T4 + T4.1)
Not sure if that can be changed at runtime.
CCM_CBCMR = (CCM_CBCMR & ~(CCM_CBCMR_FLEXSPI2_PODF_MASK | CCM_CBCMR_FLEXSPI2_CLK_SEL_MASK))
| CCM_CBCMR_FLEXSPI2_PODF(4) | CCM_CBCMR_FLEXSPI2_CLK_SEL(2); // 528/5 = 132 MHz
CCM_CCGR7 |= CCM_CCGR7_FLEXSPI2(CCM_CCGR_ON);