#if 1
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__IMXRT1052__) || defined(__IMXRT1062__)
uint32_t set_arm_clock(uint32_t frequency);
void HardFault_HandlerC(unsigned int *hardfault_args) {
volatile unsigned int stacked_r0 ;
volatile unsigned int stacked_r1 ;
volatile unsigned int stacked_r2 ;
volatile unsigned int stacked_r3 ;
volatile unsigned int stacked_r12 ;
volatile unsigned int stacked_lr ;
volatile unsigned int stacked_pc ;
volatile unsigned int stacked_psr ;
volatile unsigned int _CFSR ;
volatile unsigned int _HFSR ;
volatile unsigned int _DFSR ;
volatile unsigned int _AFSR ;
volatile unsigned int _BFAR ;
volatile unsigned int _MMAR ;
volatile unsigned int addr ;
volatile unsigned int nn ;
stacked_r0 = ((unsigned int)hardfault_args[0]) ;
stacked_r1 = ((unsigned int)hardfault_args[1]) ;
stacked_r2 = ((unsigned int)hardfault_args[2]) ;
stacked_r3 = ((unsigned int)hardfault_args[3]) ;
stacked_r12 = ((unsigned int)hardfault_args[4]) ;
stacked_lr = ((unsigned int)hardfault_args[5]) ;
stacked_pc = ((unsigned int)hardfault_args[6]) ;
stacked_psr = ((unsigned int)hardfault_args[7]) ;
// Configurable Fault Status Register
// Consists of MMSR, BFSR and UFSR
//(n & ( 1 << k )) >> k
_CFSR = (*((volatile unsigned int *)(0xE000ED28))) ;
// Hard Fault Status Register
_HFSR = (*((volatile unsigned int *)(0xE000ED2C))) ;
// Debug Fault Status Register
_DFSR = (*((volatile unsigned int *)(0xE000ED30))) ;
// Auxiliary Fault Status Register
_AFSR = (*((volatile unsigned int *)(0xE000ED3C))) ;
// Read the Fault Address Registers. These may not contain valid values.
// Check BFARVALID/MMARVALID to see if they are valid values
// MemManage Fault Address Register
_MMAR = (*((volatile unsigned int *)(0xE000ED34))) ;
// Bus Fault Address Register
_BFAR = (*((volatile unsigned int *)(0xE000ED38))) ;
//__asm("BKPT #0\n") ; // Break into the debugger // NO Debugger here.
asm volatile("mrs %0, ipsr\n" : "=r" (addr)::);
printf("\nFault irq %d\n", addr & 0x1FF);
printf(" stacked_r0 :: %x\n", stacked_r0);
printf(" stacked_r1 :: %x\n", stacked_r1);
printf(" stacked_r2 :: %x\n", stacked_r2);
printf(" stacked_r3 :: %x\n", stacked_r3);
printf(" stacked_r12 :: %x\n", stacked_r12);
printf(" stacked_lr :: %x\n", stacked_lr);
printf(" stacked_pc :: %x\n", stacked_pc);
printf(" stacked_psr :: %x\n", stacked_psr);
printf(" _CFSR :: %x\n", _CFSR);
if(_CFSR > 0){
//Memory Management Faults
if((_CFSR & 1) == 1){
printf(" (IACCVIOL) Instruction Access Violation\n");
} else if(((_CFSR & (0x02))>>1) == 1){
printf(" (DACCVIOL) Data Access Violation\n");
} else if(((_CFSR & (0x08))>>3) == 1){
printf(" (MUNSTKERR) MemMange Fault on Unstacking\n");
} else if(((_CFSR & (0x10))>>4) == 1){
printf(" (MSTKERR) MemMange Fault on stacking\n");
} else if(((_CFSR & (0x20))>>5) == 1){
printf(" (MLSPERR) MemMange Fault on FP Lazy State\n");
}
if(((_CFSR & (0x80))>>7) == 1){
printf(" (MMARVALID) MemMange Fault Address Valid\n");
}
//Bus Fault Status Register
if(((_CFSR & 0x100)>>8) == 1){
printf(" (IBUSERR) Instruction Bus Error\n");
} else if(((_CFSR & (0x200))>>9) == 1){
printf(" (PRECISERR) Data bus error(address in BFAR)\n");
} else if(((_CFSR & (0x400))>>10) == 1){
printf(" (IMPRECISERR) Data bus error but address not related to instruction\n");
} else if(((_CFSR & (0x800))>>11) == 1){
printf(" (UNSTKERR) Bus Fault on unstacking for a return from exception \n");
} else if(((_CFSR & (0x1000))>>12) == 1){
printf(" (STKERR) Bus Fault on stacking for exception entry\n");
} else if(((_CFSR & (0x2000))>>13) == 1){
printf(" (LSPERR) Bus Fault on FP lazy state preservation\n");
}
if(((_CFSR & (0x8000))>>15) == 1){
printf(" (BFARVALID) Bus Fault Address Valid\n");
}
//Usuage Fault Status Register
if(((_CFSR & 0x10000)>>16) == 1){
printf(" (UNDEFINSTR) Undefined instruction\n");
} else if(((_CFSR & (0x20000))>>17) == 1){
printf(" (INVSTATE) Instruction makes illegal use of EPSR)\n");
} else if(((_CFSR & (0x40000))>>18) == 1){
printf(" (INVPC) Usage fault: invalid EXC_RETURN\n");
} else if(((_CFSR & (0x80000))>>19) == 1){
printf(" (NOCP) No Coprocessor \n");
} else if(((_CFSR & (0x1000000))>>24) == 1){
printf(" (UNALIGNED) Unaligned access UsageFault\n");
} else if(((_CFSR & (0x2000000))>>25) == 1){
printf(" (DIVBYZERO) Divide by zero\n");
}
}
printf(" _HFSR :: %x\n", _HFSR);
if(_HFSR > 0){
//Memory Management Faults
if(((_HFSR & (0x02))>>1) == 1){
printf(" (VECTTBL) Bus Fault on Vec Table Read\n");
} else if(((_HFSR & (0x40000000))>>30) == 1){
printf(" (FORCED) Forced Hard Fault\n");
} else if(((_HFSR & (0x80000000))>>31) == 31){
printf(" (DEBUGEVT) Reserved for Debug\n");
}
}
printf(" _DFSR :: %x\n", _DFSR);
printf(" _AFSR :: %x\n", _AFSR);
printf(" _BFAR :: %x\n", _BFAR);
printf(" _MMAR :: %x\n", _MMAR);
IOMUXC_SW_MUX_CTL_PAD_GPIO_B0_03 = 5; // pin 13
IOMUXC_SW_PAD_CTL_PAD_GPIO_B0_03 = IOMUXC_PAD_DSE(7);
GPIO2_GDIR |= (1 << 3);
GPIO2_DR_SET = (1 << 3);
GPIO2_DR_CLEAR = (1 << 3); //digitalWrite(13, LOW);
if ( F_CPU_ACTUAL >= 600000000 )
set_arm_clock(300000000);
while (1)
{
GPIO2_DR_SET = (1 << 3); //digitalWrite(13, HIGH);
// digitalWrite(13, HIGH);
for (nn = 0; nn < 2000000/2; nn++) ;
GPIO2_DR_CLEAR = (1 << 3); //digitalWrite(13, LOW);
// digitalWrite(13, LOW);
for (nn = 0; nn < 18000000/2; nn++) ;
}
}
#endif
#ifdef __cplusplus
} // extern "C"
#endif
#endif