Updated 8x8 and 16x16 audio

palmerr said:
The RevA board is working nicely, however there is an input spike at ~21kHz, the magnitude of which is directly proportional to the signal level (at least for inputs from 0.9 FSD to 0.05 FSD). There is no frequency spike on a sine wave output.

The code was compiled at 600Mhz for the T4.0 using the latest teensyduino.

The spur frequency seems to be a sideband of 1/2Fs as its frequency is 21.025kHz with a primary signal of 1kHz and 21.85kHz with a 200Hz primary. The magnitude of the spike increases with frequency, being 50dB below the fundamental at 200Hz, and 5dB greater than the fundamental at 8kHz, where the spur frequency has moved down to 14.05kHz.

Adding and removing the LRCLK series resistor doesn't change the magnitude, and the frequency isn't exactly half the sample rate, so I doubt if it's crosstalk from LRCLK.

I tried some input filtering (150 ohms/2700pF), but that didn't make any difference to the magnitude of the spur.

The artefact is there and the same magnitude with both single-ended and differential inputs.

There's no active logic else on the PCB, other than the T4.0, the TLV320AIC3104s and a single inverter for BCLK.

Any clues?
Click to expand...
@palmerr
Looking forward to see your continued progress on this project.

Question: In the schematic you posted (Rev C (A Prod)), There are two sheets. There is an IC1 and IC2, but I do not see IC3, IC4 from the JPG image of the PCB. Am I missing something? Or does this schematic not match the JPG image of the PCB for some reason?

Rich
 
Rich,

Thanks for your interest.

Simple, there's a third sheet to the schematic!

The circuits for IC3&4 are identical to 1&2, so I didn't include page 3 for the purposes of the discussion needed at that point. It turned out that it was a code issue in the audio library - see PR 480 if you are interested.

When the project is complete, I'll open source the audio library driver code for the AIC3104 and the PCB design files (KiCAD) and gerbers on my github.

At this stage, I'm still testing a few things to make sure the boards will work reliably in 16x16 mode. Sometimes the signals on the MCLK and BCLK lines can get messy at > 10MHz and a few strategically placed resistors are likely to be necessary to stop impedance mismatches and signal reflections. Paul made a comment about this in one of his posts on the original SGTL5000 audio board.

You will note on the schematics posted that there are resistors for each IC on these two lines, as well as a common one near the Teensy. Currently the ones at each chip are shorted out and things work fine in 8x8 mode, but it remains to be seen how things will go with stacked boards.
 
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